1. Field of the Invention
This invention relates to a method for manufacturing a bonded SOI (a silicon on insulator) wafer in which two silicon wafers are adhered to each other through a silicon oxide film, a bonded SOI wafer manufactured by this method, and more particularly to a method for removing an outer peripheral part of the SOI wafer.
2. Description of the Related Art
As a method for manufacturing a bonded SOI wafer, it has been well known in the related art to provide a technology for bonding two silicon wafers through a silicon oxide film, for example, a method for forming an oxide film on at least one wafer, closely contacting these wafers to each other without placing any foreign materials at the joint surface, thereafter heat treating them at a temperature of about 200 to 1200xc2x0 C. to increase a bonding strength, as disclosed in the gazette of Japanese Patent Publication No. Hei 5-46086.
The bonded wafer of which bonding strength is increased through performing a heat treatment is enabled to be ground and polished after the treatment, so that the wafer applied to form an element is reduced in its thickness to a desired thickness under grinding and polishing operations and then it is possible to form the SOI layer forming an element.
However, since surfaces of both wafers just before being bonded to each other are mirror finished by a so-called mechano-chemical polishing, an area due to polishing unevenness is present at their outer peripheral portions. Accordingly, a unbonded (unjoined) portion of about 1 to 3 mm is generated at the outer peripheral portion of the bonded wafer made by bonding both wafers.
If one of the wafers is ground and polished while the unbonded portion is left, a certain peeling-off state occurs at the unbonded portion during the grinding and polishing stage, resulting in that the element forming region (device fabricating region) is applied with bad influences such as damage or adhesion of particles and the like and so it is necessary to remove the unbonded portion in advance.
In view of the foregoing, the gazette of Japanese Patent Laid-Open No. Hei 6-176993 has a proposal of method for making a bonded wafer in which two silicon wafers are closely contacted to each other through an oxide film, thereafter they are heat treated in oxidizing atmosphere, an area including a unbonded part at the outer periphery of the bonded wafer with an increased bonding strength is ground down to a location just before a bonding interface between it and a base wafer (a second silicon wafer acting as a supporting member) from a thickness direction of a bond wafer (a first silicon wafer becoming an element region), thereafter they are etched up to the bonding interface to remove the unbonded portion completely, and then the bond wafer is ground and polished to reduce its thickness up to its desired thickness.
In accordance with this method, although it becomes possible to remove the unbonded portion without changing a shape of the base wafer, it is generally applied to remove at least 3 mm from an outer peripheral edge of the bond wafer for a sake of safety as an outer peripheral removing width for removing the unbonded portion completely.
In turn, as a recent trend of high integration and high speed in operation of semiconductor devices is applied, it is required to have a thin thickness of the SOI layer and a uniform film thickness and more practically, it is required to have a film thickness and its uniformity of about 0.1xc2x10.01 xcexcm.
In order to realize the thin film SOI wafer having such a film thickness and its uniformity by a bonded substrate, the related art grinding and polishing could not attain a reduced thickness and so a so-called PACE (plasma assisted chemical etching) process disclosed in the gazette of Japanese Patent Laid-Open No. Hei 5-160074 has been developed as a new technology of attaining a thin film.
This PACE process is a method for uniforming a thickness of a thin film by a vapor phase etching, wherein a distribution of thickness of the SOI layer to be uniformed is measured in advance to make a map of thickness distribution, the thick portion is locally etched in vapor phase under a numerical control in accordance with the map and removed, thereby it is possible to make the thin film SOI layer having a thin film and quite uniform film thickness.
As a raw material wafer for making the thin film SOI wafer by this PACE process, it is a normal way to use the SOI wafer of which thickness is reduced by applying the method disclosed in the aforesaid gazette of Japanese Patent Laid-Open No. Hei 6-176993, for example, removing a unbonded portion of the outer peripheral part, and grinding and polishing the SOI wafer down to about several xcexcm or so.
However, since the SOI wafer applied as a raw material wafer for the aforesaid PACE process is applied with the aforesaid mechano-chemical polishing process at the final stage of thickness reducing work, a certain polishing unevenness may be produced at its outer peripheral part and so a thickness of the SOI layer becomes thin as it approaches the outer-most circumference as shown in FIG. 3A. Then, in the case that a desired film thickness of the SOI layer is made to be less than 1.5 xcexcm, an angle xcex8 formed between the SOI layer and a buried oxide layer is quite gradual shape of 1xc2x0 or less.
Further, as the PACE method is applied to this SOI wafer, the PACE method has a tendency that an etching speed at an outer circumference of the wafer is made faster as compared with that of its central part, so that its gradual shape is promoted and the buried oxide layer of the base is exposed at the outer-most circumference of the thin film SOI layer after performing the PACE method. Accordingly, the PACE method is originally carried out after removing about 3 mm from the outer circumferential edge of the bond wafer, so that an area having no SOI layer is further widened after performing the PACE method.
As described above, if the outer circumferential part of the SOI layer is provided with a region where the SOI layer is removed and the buried oxide layer of base part is exposed, polysilicon is deposited on the exposed oxide film at the device fabricating stage when an epitaxial layer is deposited on the SOI layer, resulting in that it may become a source of contamination such as particles or the like.
In addition, even in the case that an oxide film is not exposed just before depositing the epitaxial layer, it is exposed in hydrogen atmosphere at a high temperature when the temperature is increased for depositing the epitaxial layer, so that as shown in FIG. 3B, a reaction may occur at an interface part between the SOI layer and the oxide layer or an etching of the SOI layer with hydrogen is produced, the oxide layer is exposed at the outer circumferential part where the SOI layer is particularly thin and the similar result as that of the aforesaid one is attained after deposition of the epitaxial layer.
In turn, as described above, the SOI wafer manufactured by the related art method is set such that a diameter of the SOI layer is made smaller than that of the base wafer by about 6 mm in order to remove the unbonded portion of the outer circumference for a sake of safety. Although it is natural that the larger an effective area of the SOI wafer, the better for making the device on the SOI wafer, its diameter is originally a small value of about 6 mm and as the outer circumference part having a thin SOI layer as described above is made thinner or removed, the area where the device can be fabricated is made more narrow. In particular, this is a phenomenon occurred in the outer-most circumferential region, its influence may become large only through a reduction in effective area by about 1 mm or so.
In view of the aforesaid problems, the present inventors have searched about a position of the bonding outer circumferential end before and after performing a heat treatment of the bonded wafer and attained the following conclusion.
FIGS. 4A and 4B are sectional schematic views for showing a part near an outer circumferential part of the bonded wafer in which an oxide film is formed at the bond wafer and both the oxide film and a base wafer having no oxide film are bonded under a room temperature, thereafter they are heat treated in oxidizing atmosphere.
FIG. 4A is a sectional view just after bonding at a room temperature, wherein the outer-most circumferential part of the bonded portion between the bond wafer and the base wafer is indicated as a bonding end B at a room temperature. When the wafer is heat treated in an oxidizing atmosphere, an oxide film is grown at a region indicated in FIG. 4B in the base wafer. In turn, although the oxide film of the bond wafer is also thickened, its thickness is small as compared with that of the base wafer, so that its description is eliminated herein.
As the oxide film is grown at the base wafer, a clearance between the bond wafer and the base wafer is filled by the oxide film as shown in FIG. 4B, so that the outer-most circumferential part of the bonded portion between the bond wafer and the base wafer is moved to the heat treatment bonding end C.
In the related art, in order to avoid peeling of the unbonded portion of the bond wafer during its thickness reducing work, the SOI placed inside the bonding end B at a room temperature and from the outer circumferential end of the bond wafer to the outer circumferential end A of the SOI in FIG. 4B, i.e. to a position spaced apart by about 3 mm, for example, was completely removed through grinding and etching, thereafter a thickness reducing work for the bond wafer was carried out.
However, according to the study performed by the present inventors, it has been found that if the outer circumferential part of the bond wafer is removed in such a way that a position of the outer circumferential end A of the SOI may be located inside the heat treated bonding end C, no peeling of the bond wafer is produced at all at the thickness reducing work stage even though it is not placed inside the bonding end B at a room temperature as found in the related art and it has a bonding strength capable of enduring against manufacturing of the device.
However, a part between the bonding end B at a room temperature and a heat treated bonding end C is a region where they are bonded by filling the oxide film, so that it is preferable to set the position of the outer circumferential end A of SOI more inside the bonding end B at a room temperature in order to attain a more positive assurance that there occurs no problem such as peeling-off during manufacturing of the device.
The present invention is invented in reference to the aforesaid acknowledgement and one aspect of the invention consists in a method for manufacturing an SOI wafer characterized in that an SOI layer is formed by the steps of forming an oxide film on a surface of at least one silicon wafer of two silicon wafers, bonding the other silicon wafer through the oxide film at a room temperature, the wafers are heat treated in oxidizing atmosphere, thereafter an outer periphery of a bond wafer is removed from an outer peripheral edge of the bond wafer up to a region between bonding ends through bonding at a room temperature and heat treatment bonding ends and making the bond wafer into a thin layer of desired thickness
As described above, an outer circumferential removing width of the bond wafer is set in a region between the bonding end at a room temperature and the bonding end at a heat treatment, the device work region in the SOI layer can be widened more than that of the related art, it becomes possible to attain the SOI wafer having an SOI layer with an outer circumferential removing width of a width ranging from the outer circumferential edge of the base wafer to the outer circumferential edge of the SOI layer being less than 1 mm.
In addition, after forming the SOI layer, it is also possible to perform a vapor phase etching and form a thin film SOI layer. In this case, since the outer circumference removing width of the bond wafer is a region between the bonding end at a room temperature and a heat treated bonding end and the oxide film thickness exposed by removing the outer circumference is thicker than that of the buried oxide layer, resulting in that even if the vapor phase etching is present as found in the PACE process in such a way that an extreme difference is not provided in an etching rate between silicon and oxide film, it is possible to prevent occurrence of surplus groove or step caused by the etching reached to the surface of the base wafer. In addition, the outer circumference removing width before performing a vapor phase etching is set between the bonding end at a room temperature and a heat treated bonding end, so that even after performing the vapor phase etching, it is possible to attain positively the thin film SOI wafer in which the film thickness of the SOI layer is 1.5 xcexcm or less and the outer circumference removing width is 3 mm or less.
Further, it is possible to assure positively that problems such as peeling during the device fabrication are not produced by removing the outer circumference of either the aforesaid SOI layer or the thin film SOI layer up to the inside of the bonding end at a room temperature after forming either said SOI layer or said thin film SOI layer, the uneven thickness part at the outer circumference generated by polishing or vapor phase etching can be removed and the exposure of the buried oxide layer during epitaxial growth can be prevented positively. Since these outer circumferential unevenness is remarkable in the case that a thickness of the SOI layer is 1.5 xcexcm or less, if it is applied to the SOI wafer having a thickness of 1.5 xcexcm or less, its effect is remarkable.
In another aspect of the present invention, an oxide film is formed on a surface of at least one silicon wafer of two silicon wafers, the other silicon wafer is bonded through the oxide film at a room temperature, the wafers are heat treated in oxidizing atmosphere, thereafter an outer periphery of a bond wafer is removed from an outer peripheral edge of the bond wafer up to a first region inside bonding ends through their bonding at a room temperature, a thickness of the bond wafer is reduced to a desired thickness to form an SOI layer, thereafter an outer periphery of the SOI layer is removed down to inside the first region.
Even with this method, it is similarly possible to perform a positive prevention of exposure of the buried oxide layer during epitaxial growth. Then, this method may provide a more effect if it is applied to the SOI wafer with the film thickness of the SOI layer being 1.5 xcexcm or less.
In further aspect of the present invention, there is provided an SOI wafer in which a film thickness of the SOI layer is 1.5 xcexcm or less and the SOI wafer is characterized in that an angle formed by a surface near the outer circumferential edge of the SOI, the buried oxide layer and an interface of the SOI layer is approximately more than 2xc2x0, it is possible to prevent positively an exposure of the buried oxide layer during epitaxial growth.